QL4009-3PL68I 데이터 시트보기 (PDF) - QuickLogic Corporation

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QL4009-3PL68I

9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM

QuickLogic Corporation 

Power-up Sequencing

QL4009 QuickRAM Data Sheet Rev B

VCCIO

VCC

(VCCIO -VCC)MAX

VCC

400 us

Time

Figure 7: Power-up Requirements

The following requirements must be met when powering up the device:

(Refer to Figure 7 above)

• When ramping up the power supplies keep (VCCIO -VCC)MAX ≤ 500 mV. Deviation from

this recommendation can cause permanent damage to the device.

• VCCIO must lead VCC when ramping the device.

• The power supply must take greater than or equal to 400 µs to reach VCC. Ramping to

VCC/VCCIO earlier than 400 µs can cause the device to behave improperly.

An internal diode is present in-between VCC and VCCIO, as shown in Figure 8.

V CC

V CCIO

Internal Logic

Cells, RAM

blocks, etc

IO Cells

Figure 8: Internal Diode Between VCC and VCCIO

© 2002 QuickLogic Corporation

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