M45PE80-VMN6TP 데이터 시트보기 (PDF) - Numonyx -> Micron

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M45PE80-VMN6TP

8 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface

Numonyx -> Micron 

Revision history

M45PE80

Table 21. Document revision history

Date

Version

Changes

15-Dec-2006

50 MHz frequency added, Table 14: AC characteristics (50 MHz

operation) added. Small text changes.

Section 2.5: Reset (Reset) updated. VCC supply voltage and VSS ground

descriptions added.

Figure 3: Bus master and memory devices on the SPI bus modified and

explanatory text added.

8

Behavior of WIP bit specified at Power-up in Section 7: Power-up and

Power-down.

VIO max modified and TLEAD added in Table 7: Absolute maximum

ratings.

Table 15: Reset conditions and Table 16: Timings after a Reset Low

pulse updated.

SO8N package added (T9HX technology only), SO8W and VFQFPN8

package specifications updated (see Section 11: Package mechanical).

10-Dec-2007

9 Applied Numonyx branding.

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