M25PE10-VMN6TP 데이터 시트보기 (PDF) - Numonyx -> Micron
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M25PE10-VMN6TP
Numonyx -> Micron
M25PE10-VMN6TP Datasheet PDF : 64 Pages
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Instructions
M25PE20, M25PE10
6.7
Read Data Bytes at Higher Speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on Serial Data output (Q), each bit
being shifted out, at a maximum frequency fC, during the falling edge of Serial Clock (C).
The instruction sequence is shown in Figure 14.
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at Higher Speed (FAST_READ)
instruction. When the highest address is reached, the address counter rolls over to
000000h, allowing the read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driven High at any time during data output. Any
Read Data Bytes at Higher Speed (FAST_READ) instruction, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in
progress.
Figure 14. Read Data Bytes at Higher Speed (FAST_READ) instruction sequence
and data-out sequence
S
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31
C
Instruction
24-bit address
D
23 22 21 3 2 1 0
High Impedance
Q
S
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
C
Dummy byte
D
76543210
DATA OUT 1
DATA OUT 2
Q
76543210765432107
MSB
MSB
MSB
AI04006
1. Address bits A23 to A18 are ‘Don’t care’ in the M25PE20. Address bits A23 to A17 are ‘Don’t care’ in the
M25PE10.
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