ST92F124/F150/F250 - EXTERNAL MEMORY INTERFACE (EXTMI)
EXTERNAL MEMORY SIGNALS (Cont’d)
Figure 77. Effects of DS2EN on the behavior of DS and DS2
n
NO WAIT CYCLE
T1
T2
1 DS WAIT CYCLE
T1
T2
SYSTEM
CLOCK
AS (MC=0)
DS STRETCH
ALE (MC=1)
DS2EN=0 OR (DS2EN=1 AND UPPER MEMORY ADDRESSED):
DS
(MC=0)
DS2
(MC=0)
OEN
(MC=1, READ)
OEN
(MC=1, WRITE)
OEN2
(MC=1)
DS2EN=1 AND LOWER MEMORY ADDRESSED:
DS
(MC=0)
DS2
(MC=0)
OEN
(MC=1)
OEN2
(MC=1, READ)
OEN2
(MC=1, WRITE)
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