QL3040-0PL68I 데이터 시트보기 (PDF) - QuickLogic Corporation

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QL3040-0PL68I

Up to 60,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density

QuickLogic Corporation 

pASIC 3 FPGA Family Data Sheet Rev. D

QL3040 – 208 PQFP Pinout Diagram

Figure 23: QL3040 – 208 Pin PQFP (Top View)

Pin 1

Pin 157

Pin 53

pASIC 3

QL3040-1PQ208C

Pin 105

© 2005 QuickLogic Corporation

www.quicklogic.com

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