CS8420-CSZ 데이터 시트보기 (PDF) - Cirrus Logic

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CS8420-CSZ

Digital Audio Sample Rate Converter

Cirrus Logic 

13.7.1 Pin Description - Hardware Mode 6

CS8420

COPY/C 1

DFC0 2

EMPH 3

SFMT0 4

SFMT1 5

VA+ 6*

AGND 7*

FILT 8*

RST 9*

APMS 10

TCBLD 11

ILRCK 12

ISCLK 13

SDIN 14

28 ORIG

27 DFC1

26 TXP

25 TXN

*24 H/S

*23 VD+

*22 DGND

21 OMCK

20 S/AES

19 AUDIO

18 U

17 V

16 CEN

15 TCBL

* Pins which remain the same function in all modes.

Overall Device Control:

DFC0, DFC1 - Data Flow Control Inputs

DFC0 and DFC1 inputs determine the major data flow options available in Hardware mode, according to Table 5.

S/AES - Serial Audio or AES3 Input Select

S/AES is connected to VD+ in Hardware mode 6, in order to select the serial audio input.

SFMT0, SFMT1 - Serial Audio Input Port Data Format Select Inputs

SFMT0 and SFMT1 select the serial audio input port format. See Table 15.

OMCK - Output Section Master Clock Input

Output section master clock input. The frequency must be 256x the output sample rate (Fso).

Audio Input Interface:

SDIN - Serial Audio Input Port

Data Input Audio data serial input pin.

ISCLK - Serial Audio Input Port Bit Clock

Input or Output Serial bit clock for audio data on the SDIN pin.

76

DS245F4

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