CS8415A-CSR 데이터 시트보기 (PDF) - Cirrus Logic

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CS8415A-CSR

96 kHz Digital Audio Interface Receiver

Cirrus Logic 

CS8415A

One-byte mode saves the user substantial control port access time, as it effectively accesses 2 bytes worth

of information in 1 byte's worth of access time. If the control port's autoincrement addressing is used in com-

bination with this mode, multi-byte accesses such as full-block reads can be done especially efficiently.

14.2.3.2 Two-Byte Mode

There are those applications in which the A and B channel status blocks will not be the same, and the user

is interested in accessing both blocks. In these situations, two-byte mode should be used to access the E

buffer.

In this mode, a read will cause the CS8415A to output two bytes from its control port. The first byte out will

represent the A channel status data, and the 2nd byte will represent the B channel status data.

14.3 AES3 User (U) Bit Management

Entire blocks of U data are buffered using a cascade of 2 block-sized RAMs to perform the buffering. The

user has access to the second of these buffers, denoted the E buffer, through the control port. The U buffer

access only operates in two-byte mode, since there is no concept of A and B blocks for user data. The ar-

rangement of the data is as followings: Bit15[A7]Bit14[B7]Bit13[A6]Bit12[B6]...Bit1[A0]Bit0[B0]. The ar-

rangement of the data in the each byte is that the MSB is the first received bit and is the first transmitted bit.

The first byte read is the first byte received, and the first byte sent is the first byte transmitted. If you read

two bytes from the E buffer, you will get the following arrangement: A[7]B[7]A[6]B[6]....A[0]B[0].

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DS470F4

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