CS7615 데이터 시트보기 (PDF) - Cirrus Logic
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CS7615 Datasheet PDF : 36 Pages
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CS7615
Timing Control - V2X Registers (4Ah-4Bh)
4Ah:
7
V2R7
r/w
6
V2R6
r/w
5
V2R5
r/w
4
V2R4
r/w
3
V2R3
r/w
2
V2R2
r/w
1
V2R1
r/w
4Bh:
7
V2F7
r/w
6
V2F6
r/w
5
V2F5
r/w
4
V2F4
r/w
3
V2F3
r/w
2
V2F2
r/w
1
V2F1
r/w
V2X is a vertical register shift clock.
V2R
Number of pixels from HREF to leading edge of V2X. Default is 2Ch.
V2F
Number of pixels from HREF to trailing edge of V2X. Default is 40h.
Timing Control - V3X Registers (4Ch-4Dh)
4Ch:
7
V3F7
r/w
6
V3F6
r/w
5
V3F5
r/w
4
V3F4
r/w
3
V3F3
r/w
2
V3F2
r/w
1
V3F1
r/w
4Dh:
7
V3R7
r/w
6
V3R6
r/w
5
V3R5
r/w
4
V3R4
r/w
3
V3R3
r/w
2
V3R2
r/w
1
V3R1
r/w
V3X is a vertical register shift clock.
V3F
Number of pixels from HREF to leading edge of V3X. Default is 1Dh.
V3R
Number of pixels from HREF to trailing edge of V3X. Default is 3Bh.
0
V2R0
r/w
0
V2F0
r/w
0
V3F0
r/w
0
V3R0
r/w
24
DS231PP6
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