CS5541
LIST OF FIGURES
Figure 1. Continuous Running SCLK Timing (Not to Scale) ................................ 9
Figure 2. SDI Write Timing (Not to Scale) ............................................................ 9
Figure 3. SDO Read Timing (Not to Scale) .......................................................... 9
Figure 4. Multiplexer Configuration. ................................................................... 10
Figure 5. Input model for AIN+ and AIN- pins. ................................................... 10
Figure 6. Resolution vs. Voltage Reference ....................................................... 11
Figure 7. Resolution vs. Voltage Reference ....................................................... 11
Figure 8. Input model for VREF+ and VREF- pins. ............................................ 11
Figure 9. CS5541 Configured with +3.0 V Analog Supply. ................................ 12
Figure 10. CS5541 Register Diagram. ............................................................... 13
Figure 11. Command and Data Word Timing. ................................................... 13
Figure 12. Self Calibration of Offset. .................................................................. 16
Figure 13. Self Calibration of Gain. .................................................................... 16
Figure 14. Digital Filter 1 Response ................................................................... 19
Figure 15. Filter 2 Response (MCLK = 32.768 kHz) .......................................... 19
LIST OF TABLES
Table 1. Filter Output Word Rates ................................................................................................ 14
Table 2. Output Conversion Data Register Description (24 bits + flags) ...................................... 18
Table 3. CS5541 24-Bit Output Coding......................................................................................... 19
DS500PP1
3