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CS5461-IS

Single Phase Bi-Directional Power/Energy IC

Cirrus Logic 

CS5461

±0.1%. This linearity is guaranteed for all four of

the available full-scale input voltage ranges.

Note that until the CS5461 is calibrated (see Cali-

bration) the accuracy of the CS5461 (with respect

to a reference line-voltage and line-current level on

the power mains) is not guaranteed to within

±0.1%. But the linearity of any given sample of

CS5461, before calibration, will be within ±0.1%

of reading over the ranges specified, with respect to

the input voltage levels required to cause full-scale

readings in the Irms/Vrms Registers. Table 1 de-

scribes linearity + variation specs after the comple-

tion of each successive computation cycle.

4. FUNCTIONAL DESCRIPTION

4.1 Analog Inputs

The CS5461 has two available full-scale differen-

tial input voltage ranges on the current channel and

one full-scale differential input voltage range on

the voltage channel.

The input ranges are the maximum sinusoidal sig-

nals that can be applied to the current and voltage

channels, yet these values will not result in full

scale registration in the instantaneous current and

voltage registers.

If the current and voltage channels are set to

500 mVP-P, only a 250 mVRMS signal will register

full scale. Yet it would not be practical to inject a

sinusoidal signal with a value of 250 mVRMS.

When such a sine wave enters the higher levels of

its positive crest region (over each cycle), the volt-

age level of this signal exceeds the maximum dif-

ferential input voltage range of the input channels.

The largest sine wave voltage signal that can be

placed across the inputs, with no saturation is:

500mVP-P = ~176.78mVRMS

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which is ~70.7% of full-scale. So for sinusoidal in-

puts at the full scale peak-to-peak level the full

scale registration is ~.707.

The accuracy of the internal calculations can often

be improved by selecting a value for the Cy-

cle-Count Register that will cause the time duration

of one computation cycle to be equal (or very close

to) a whole-number of power-line cycles (and N

must be greater than or equal to 4000). For exam-

ple, with the cycle count set to 4200, the ±0.1% of

reading linearity range for measurement of a 60 Hz

sinusoidal current-sense voltage signal can be in-

creased beyond the range of 0.2% - 70.7%. The lin-

earity range can be increased because (4200

samples / 60 Hz) is a whole number of cycles (70).

4.2 Voltage Reference

The CS5461 is specified for operation with a

+2.5 V reference between the VREFIN and VA-

pins. The converter includes an internal 2.5 V ref-

erence (60 ppm/°C drift) that can be used by con-

necting the VREFOUT pin to the VREFIN pin of

the device. If higher accuracy/stability is required,

an external reference can be used.

4.3 Oscillator Characteristics

XIN and XOUT are the input and output of an in-

verting amplifier to provide oscillation and can be

configured as an on-chip oscillator, as shown in

Figure 3. The oscillator circuit is designed to work

with a quartz crystal or a ceramic resonator. To re-

duce circuit cost, two load capacitors C1 and C2 are

integrated in the device. With these load capacitors,

the oscillator circuit is capable of oscillation up to

20 MHz. To drive the device from an external

clock source, XOUT should be left unconnected

while XIN is driven by the external circuitry. There

is an amplifier between XIN and the digital section

which provides CMOS level signals. This amplifier

works with sinusoidal inputs so there are no prob-

lems with slow edge times.

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DS546F2

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