CS4614-CM 데이터 시트보기 (PDF) - Cirrus Logic
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CS4614-CM Datasheet PDF : 24 Pages
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CS4614
CrystalClear™ SoundFusion™ PCI Audio Accelerator
A ‘#’ sign suffix on a pin names indicates an active-low signal.
PCI Interface
AD[31:0] - Address/Data Bus, I/O, Pins 88-92, 95-97, 2-6, 9-11, 28-29, 32-37, 41-48
These pins form the multiplexed address / data bus for the PCI interface.
C/BE[3:0]# - Command Type / Byte Enables, I/O, Pins 98, 14, 27, 38
These four pins are the multiplexed command / byte enables for the PCI interface. During the
address phase of a transaction, these pins indicate cycle type. During the data phases of a
transaction, active low byte enable information for the current data phase is indicated. These
pins are inputs during slave operation and they are outputs during bus mastering operation.
PAR - Parity, I/O, Pin 26
The Parity pin indicates even parity across AD[31:0] and C_BE[3:0] for both address and data
phases. The signal is delayed one PCI clock from either the address or data phase for which
parity is generated.
FRAME# - Cycle Frame, I/O, Pin 15
FRAME# is driven by the current PCI bus master to indicate the beginning and duration of a
transaction.
IRDY# - Initiator Ready, I/O, Pin 16
IRDY# is driven by the current PCI bus master to indicate that as the initiator it is ready to
transmit or receive data (complete the current data phase).
TRDY# - Target Ready, I/O, Pin 17
TRDY# is driven by the current PCI bus target to indicate that as the target device it is ready to
transmit or receive data (complete the current data phase).
STOP# - Transition Stop, I/O, Pin 23
STOP# is driven active by the current PCI bus target to indicate a request to the master to stop
the current transaction.
IDSEL - Initialize Device Select, Input, Pin 99
IDSEL is used as a chip select during PCI configuration read and write cycles.
DEVSEL# - Device Select, I/O, Pin 20
DEVSEL# is driven by the PCI bus target device to indicate that it has decoded the address of
the current transaction as its own chip select range.
DS292PP3
CIRRUS LOGIC PRELIMINARY PRODUCT BULLETIN JUNE 30, 5:03 PM
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