CS4384-CQZR 데이터 시트보기 (PDF) - Cirrus Logic
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CS4384-CQZR Datasheet PDF : 50 Pages
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5.8.6
CS4384
MUTE Polarity and DETECT (MUTEP1:0)
Default = 00
00 - Auto polarity detect, selected from MUTEC1 pin
01 - Reserved
10 - Active low mute polarity
11 - Active high mute polarity
Function:
Auto mute polarity detect (00)
See Section 3.11 on page 29 for the description.
Active low mute polarity (10)
When RST is low the outputs are high impedance and will need to be biased active. Once reset has been
released and after this bit is set, the MUTEC output pins will be active low polarity.
Active high mute polarity (11)
At reset time the outputs are high impedance and will need to be biased active. Once reset has been re-
leased and after this bit is set, the MUTEC output pins will be active high polarity.
5.9 Mute Control (address 09h)
7
MUTE_B4
0
6
MUTE_A4
0
5
MUTE_B3
0
4
MUTE_A3
0
3
MUTE_B2
0
2
MUTE_A2
0
1
MUTE_B1
0
0
MUTE_A1
0
5.9.1
Mute (MUTE_xx)
Default = 0
0 - Disabled
1 - Enabled
Function:
The Digital-to-Analog converter output will mute when enabled. The quiescent voltage on the output will
be retained. The muting function is affected, similarly to attenuation changes, by the Soft and Zero Cross
bits. The MUTE pins will go active during the mute period according to the MUTEC bit.
5.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h)
7
Reserved
0
6
Px_DEM1
0
5
Px_DEM0
0
4
PxATAPI4
0
3
PxATAPI3
1
2
PxATAPI2
0
1
PxATAPI1
0
0
PxATAPI0
1
5.10.1 De-Emphasis Control (PX_DEM1:0)
Default = 00
00 - Disabled
01 - 44.1 kHz
10 - 48 kHz
11 - 32 kHz
Function:
DS620A1
41
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