CS4384 데이터 시트보기 (PDF) - Cirrus Logic
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CS4384 Datasheet PDF : 50 Pages
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CS4384
SWITCHING CHARACTERISTICS - PCM
(Inputs: Logic 0 = GND, Logic 1 = VLS, CL = 30 pF)
Parameters
RST pin Low Pulse Width
MCLK Frequency
MCLK Duty Cycle
Input Sample Rate - LRCK (Manual selection)
Input Sample Rate - LRCK (Auto detect)
LRCK Duty Cycle
SCLK Duty Cycle
SCLK High Time
SCLK Low Time
LRCK Edge to SCLK Rising Edge
SCLK Rising Edge to LRCK Falling Edge
SDIN Setup Time Before SCLK Rising Edge
SDIN Hold Time After SCLK Rising Edge
Symbol
(Note 14)
(Note 15)
Single-Speed Mode Fs
Double-Speed Mode Fs
Quad-Speed Mode Fs
Single-Speed Mode Fs
Double-Speed Mode Fs
Quad-Speed Mode Fs
(Note 16)
tsckh
tsckl
tlcks
tlckd
tds
tdh
Min
1
1.024
45
4
50
100
4
84
170
45
45
8
8
5
5
3
5
Max
-
55.2
55
54
108
216
54
108
216
55
55
-
-
-
-
-
-
Units
ms
MHz
%
kHz
kHz
kHz
kHz
kHz
kHz
%
%
ns
ns
ns
ns
ns
ns
Notes:
14. After powering up, RST should be held low until after the power supplies and clocks are settled.
15. See Tables 1 - 3 for suggested MCLK frequencies.
16. Not required for TDM mode.
LRCK
SCLK
SDINx
tlcks
tsckh
tsckl
tds
tdh
MSB
MSB-1
Figure 1. Serial Audio Interface Timing
LRCK
SCLK
SDIN1
t lcks
t lckd
t lcks
t sckh
tsckl
tds
tdh
MSB
MSB-1
Figure 2. TDM Serial Audio Interface Timing
14
DS620A1
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