CS4340-BS 데이터 시트보기 (PDF) - Cirrus Logic

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CS4340-BS

24-Bit, 96 kHz Stereo DAC for Audio

Cirrus Logic 

CS4340

LRCK

SCLK

SDATA 0

Left Channel

23 22 21 20 19 18

32 clocks

76543210

Right Channel

23 22 21 20 19 18

76543210

Internal SCLK Mode

Right Justified, 24-Bit Data

INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128

INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

Right Justified, 24-Bit Data

Data Valid on Rising Edge of SCLK

SCLK Must Have at Least 48 Cycles per LRCK Period

Figure 18. CS4340 Format 2

LRCK

SCLK

SDATA

Left Channel

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

32 clocks

Right Channel

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Internal SCLK Mode

Right Justified, 16-Bit Data

INT SCLK = 32 Fs if MCLK/LRCK = 512, 256 or 128

INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

Right Justified, 16-Bit Data

Data Valid on Rising Edge of SCLK

SCLK Must Have at Least 32 Cycles per LRCK Period

Figure 19. CS4340 Format 3

20

DS297PP3

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