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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

CS4271 데이터 시트보기 (PDF) - Cirrus Logic

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CS4271 Datasheet PDF : 53 Pages
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CS4271
5.1.3.2 Clock Ratio Selection
Depending on the use of an external crystal, or whether the CS4271 is in Master or Slave Mode, different
MCKL/LRCK and SCLK/LRCK ratios may be used. These ratios are shown in the Tables 3 and 4 below.
Table 3. Clock Ratios - Stand Alone Mode With External Crystal
External Crystal Used, MCLK=Output
Single Speed
Double Speed
Quad Speed
Master Mode
MCLK/LRCK
SCLK/LRCK
256
64
128
64
128
64
LRCK
Fs
Fs
Fs
Single Speed
Double Speed
Quad Speed
Slave Mode
MCLK/LRCK
SCLK/LRCK
256
32, 64, 128
128
32, 64
128
32, 64
LRCK
Fs
Fs
Fs
Table 4. Clock Ratios - Stand Alone Mode Without External Crystal
External Crystal Not Used, MCLK=Input
Single Speed
Double Speed
Quad Speed
Master Mode
MCLK/LRCK
SCLK/LRCK
256
64
128
64
64
32
LRCK
Fs
Fs
Fs
Single Speed
Double Speed
Quad Speed
Slave Mode
MCLK/LRCK
SCLK/LRCK
256
32, 64, 128
384
32, 48, 64, 96, 128
512
32, 64, 128
128
32, 64
192
32, 48, 64
256
32, 64
64
32
96
48
128
32, 64
LRCK
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
DS592F1
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