CS4220 데이터 시트보기 (PDF) - Cirrus Logic

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CS4220

24-Bit Stereo Audio Codec with 3V Interface

Cirrus Logic 

CS4220 CS4221

8.9 Memory Address Pointer (MAP)

7

INCR

0

6

Reserved

0

5

Reserved

0

4

Reserved

0

3

Reserved

0

8.9.1 AUTO-INCREMENT CONTROL (INCR)

Default = 0

0 - Disabled

1 - Enabled

8.9.2 REGISTER POINTER (MAP)

Default = 000

2

MAP2

0

1

MAP1

0

0

MAP0

0

CS

CCLK

CDIN

CHIP

ADDRESS

0010000

MAP

DATA

R/W

MSB

byte 1

MAP = Memory Address Pointer

LSB

byte n

Figure 6. Control Port Timing, SPI mode

SDA

001000

SCL

Start

ADDR

AD0

R/W

ACK

DATA 1-8

ACK

DATA 1-8

Figure 7. Control Port Timing, I2C mode

ACK

Stop

24

DS284PP3

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