C8051F91X-C8051F90X 데이터 시트보기 (PDF) - Silicon Laboratories

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C8051F91X-C8051F90X

Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU

Silicon Laboratories 

C8051F91x-C8051F90x

SFR Definition 7.4. CPT1MD: Comparator 1 Mode Selection

Bit

7

6

5

4

3

2

1

0

Name

CP1RIE CP1FIE

CP1MD[1:0]

Type R/W

R

R/W

R/W

R

R

R/W

Reset

1

0

0

0

0

0

1

0

SFR Page = 0x0; SFR Address = 0x9C

Bit Name

Function

7 Reserved Reserved.

Read = 1b, Must Write 1b.

6

Unused Unused.

Read = 00b, Write = don’t care.

5

CP1RIE Comparator1 Rising-Edge Interrupt Enable.

0: Comparator1 Rising-edge interrupt disabled.

1: Comparator1 Rising-edge interrupt enabled.

4

CP1FIE Comparator1 Falling-Edge Interrupt Enable.

0: Comparator1 Falling-edge interrupt disabled.

1: Comparator1 Falling-edge interrupt enabled.

3:2 Unused Unused.

Read = 00b, Write = don’t care.

1:0 CP1MD[1:0] Comparator1 Mode Select

These bits affect the response time and power consumption for Comparator1.

00: Mode 0 (Fastest Response Time, Highest Power Consumption)

01: Mode 1

10: Mode 2

11: Mode 3 (Slowest Response Time, Lowest Power Consumption)

94

Rev. 1.0

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