C8051F91X-C8051F90X 데이터 시트보기 (PDF) - Silicon Laboratories

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C8051F91X-C8051F90X

Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU

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C8051F91x-C8051F90x

SFR Definition 5.5. ADC0TK: ADC0 Burst Mode Track Time

Bit

7

6

5

4

3

2

1

0

Name Reserved

AD0TK[5:0]

Type

R

R

R/W

Reset

0

0

0

1

1

1

1

0

SFR Page = 0xF; SFR Address = 0xBD

Bit Name

Function

7:6 Reserved Reserved.

Read = 0b; Write = Must Write 0b.

6 Unused Unused.

Read = 0b; Write = Don’t Care.

5:0 AD0TK[5:0] ADC0 Burst Mode Track Time.

Sets the time delay between consecutive conversions performed in Burst Mode.

The ADC0 Burst Mode Track time is programmed according to the following equa-

tion:

AD0TK

or

=

63 – T---5-t--0r---a-n--c-s--k- – 1

Ttrack = 64 – AD0TK50ns

Notes:

1. If AD0TM is set to 1, an additional 3 SAR clock cycles of Track time will be inserted prior to starting the

conversion.

2. The Burst Mode Track delay is not inserted prior to the first conversion. The required tracking time for the first

conversion should be met by the Burst Mode Power-Up Time.

Rev. 1.0

73

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