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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

74LVX541 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74LVX541 Datasheet PDF : 6 Pages
1 2 3 4 5 6
September 1999
Revised April 2005
74LVX541
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
The LVX541 is an octal non-inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The inputs tolerate up
to 7V allowing interface of 5V systems to 3V systems.
Features
s Input voltage translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX541M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX541SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
Descriptions
OE1, OE2
I0 - I7
O0 - O7
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
Truth Table
Inputs
OE1
L
H
X
L
H HIGH Voltage Level
L LOW Voltage Level
OE2
I
L
H
X
X
H
X
L
L
X Immaterial
Z High Impedance
Outputs
H
Z
Z
L
© 2005 Fairchild Semiconductor Corporation DS500291
www.fairchildsemi.com

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