CS5376-BS データシートの表示（PDF） - Cirrus Logic

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CS5376-BS

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

controller to SPI 1 connection during the initial EE-

PROM boot. After the initial configuration is

loaded, the microcontroller seizes control of the

SPI 1 port and updates the configuration as re-

quired. The EEPROM will not interfere with mi-

crocontroller to SPI 1 transactions provided the

initial stand-alone boot was completed.

Updated configuration information from the micro-

controller can not be written until the EEPROM

boot loader has relinquished control of the SPI 1

port. To guarantee this, the microcontroller should

monitor the CS5376 CS11 / GPIO11 pin into the

EEPROM for inactivity, or simply wait the maxi-

mum time required to boot from EEPROM. The re-

quired boot time from EEPROM depends on the

number of coefficients written, the number of reg-

isters written, and if test bit stream data is written.

A final requirement for hybrid boot mode is the

ability to address both the CS5376 and the config-

uration EEPROM. When writing to the CS5376

SPI 1 port, serial transactions use an 8-bit address.

Supported serial EEPROMs, however, require seri-

al transactions to use 16-bit addressing. If a micro-

controller is to interface with the CS5376 and also

be able to in-circuit reprogram the configuration

EEPROM, the serial port connection must support

both addressing modes.

See “Serial Peripheral Interface 1” on page 21 for

information about connections to the SPI 1 port,

the format required for EEPROM data, and the

SPI 1 commands available for updating the config-

uration.

4.3 Reset Self-Tests

After the reset signal is de-asserted but before the

CS5376 starts the boot operation, a series of self

test are run. These tests check the operation of the

decimation engine and report pass/fail codes in the

SELFTEST register (0x2F). The full suite of self

tests require approximately 60ms to complete.

Program ROM Test

This self-test calculates a checksum from the con-

tents of program ROM and compares against an ex-

pected value. The result of this test is 0x00000A if

passed or 0x00000F if failed.

Data ROM Test

This self-test calculates a checksum from the con-

tents of data ROM and compares against an expect-

ed value. The result of this test is 0x0000A0 if

passed or 0x0000F0 if failed.

Program RAM Test

This self-test writes a series of patterns into the pro-

gram RAM and compares against expected read

values. The result of this test is 0x000A00 if passed

or 0x000F00 if failed.

Data RAM Test

This self-test writes a series of patterns into the data

RAM and compares against expected read values.

The result of this test is 0x00A000 if passed or

0x00F000 if failed.

Execution Unit Test

This self-test exercises the execution unit with a se-

quence of calculations, comparing against expect-

ed values. The result of this test is 0x0A0000 if

passed or 0x0F0000 if failed.

DS256PP1

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