CS4362ADQZR データシートの表示（PDF） - Cirrus Logic
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CS4362ADQZR Datasheet PDF : 50 Pages
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CS4362A
6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring
CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de-
sired, bring CS high.
CS
CCLK
C D IN
CHIP
ADDRESS
0011000
MAP
DATA
R/W
MSB
LSB
byte 1 byte n
M AP = M em ory Address Pointer
Figure 19. Control Port Timing, SPI Mode
4.15 Memory Address Pointer (MAP)
7
INCR
0
6
Reserved
0
5
Reserved
0
4
MAP4
0
4.16 INCR (Auto Map Increment Enable)
Default = ‘0’
0 - Disabled
1 - Enabled
4.16.1 MAP4-0 (Memory Address Pointer)
Default = ‘00000’
3
MAP3
0
2
MAP2
0
1
MAP1
0
0
MAP0
0
DS617F2
31
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