STM32F103VB データシートの表示（PDF） - STMicroelectronics

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STM32F103VB

Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces

STMicroelectronics 

Electrical characteristics

STM32F103xx

Figure 23. ADC accuracy characteristics

1023

1022

1021

7

6

5

4

3

2

1

1LSBIDEAL

=

-V----D-----D----A------–----V-----S----S-----A--

1024

(2)

ET

EG

(3)

(1)

EO

EL

ED

1 LSBIDEAL

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

ET=Total Unadjusted Error: maximum deviation

between the actual and the ideal transfer curves.

EO=Offset Error: deviation between the first actual

transition and the first ideal one.

EG=Gain Error: deviation between the last ideal

transition and the last actual one.

ED=Differential Linearity Error: maximum deviation

between actual steps and the ideal one.

EL=Integral Linearity Error: maximum deviation

between any actual transition and the end point

correlation line.

0

1234567

VSSA

1021 1022 1023 1024

VDDA

ai14395

Figure 24. Typical connection diagram using the ADC

RAIN

AINx

VAIN

CAIN(1)

VDD

VT

0.6V

VT

0.6V

STM32F103xx

RADC 12-bit A/D

conversion

IL±1mA

CADC

ai14150

1. Refer to Table 39 for the values of RADC and CADC.

2. CPARASITIC must be added to CAIN. It represents the capacitance of the PCB (dependent on soldering and

PCB layout quality) plus the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion

accuracy. To remedy this, fADC should be reduced.

56/67

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