M45PE20-VMN6TP データシートの表示（PDF） - STMicroelectronics

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M45PE20-VMN6TP

2 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface

STMicroelectronics 

M45PE20

REVISION HISTORY

Table 16. Document Revision History

Date

Version

Description of Revision

30-Apr-2003

1.0

Document written

04-Jun-2003

1.1

Description corrected of entering Hardware Protected mode (W must be driven, and

cannot be left unconnected).

VIO(min) extended to –0.6V, tPW(typ) and tPP(typ) improved. Table of contents, warning

04-Dec-2003

1.2

about exposed paddle on MLP8, and Pb-free options added. Change of naming for

VDFPN8 package

21-Apr-2004

1.3

Soldering temperature information clarified for RoHS compliant devices. Device Grade

clarified

22-Sep-2004

2.0

Document promoted to Preliminary Data. Minor wording changes. Device Grade

further clarified

08-Oct-2004

3.0

Document promoted to Mature Datasheet. No other changes

34/35

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