PSD913G3V-C-90UI データシートの表示（PDF） - STMicroelectronics
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PSD913G3V-C-90UI Datasheet PDF : 94 Pages
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PSD9XX Family
The
PSD9XX
Functional
Blocks
(cont.)
Preliminary Information
9.4.3.3 Drive Select Register
The Drive Select Register configures the pin driver as Open Drain or CMOS for some port
pins, and controls the slew rate for the other port pins. An external pull-up resistor should
be used for pins configured as Open Drain.
A pin can be configured as Open Drain if its corresponding bit in the Drive Select Register
is set to a ‘1’. The default pin drive is CMOS.
Aside: the slew rate is a measurement of the rise and fall times of an output. A higher
slew rate means a faster output response and may create more electrical noise. A pin
operates in a high slew rate when the corresponding bit in the Drive Register is set to ‘1’.
The default rate is slow slew.
Table 27 shows the Drive Register for Ports A, B, C, and D. It summarizes which pins can
be configured as Open Drain outputs and which pins the slew rate can be set for.
Table 27. Drive Register Pin Assignment
Drive
Register
Bit 7
Bit 6
Bit 5
Bit 4
Port A
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port B
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port D NA
NA
NA
NA
NOTE: NA = Not Applicable.
Bit 3
Slew
Rate
Slew
Rate
NA
Bit 2
Slew
Rate
Slew
Rate
Slew
Rate
Bit 1
Slew
Rate
Slew
Rate
Slew
Rate
Bit 0
Slew
Rate
Slew
Rate
Slew
Rate
48
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