FDC6303 Datasheet - Fairchild Semiconductor

General Description
These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors in load switching applications. Since bias resistors are not required this one N-Channel FET can replace several digital transistors with different bias resistors like the IMHxA series.

FEATUREs
■ 25 V, 0.68 A continuous, 2 A Peak.
   RDS(ON) = 0.6 W @ VGS = 2.7 V
   RDS(ON) = 0.45 W @ VGS= 4.5 V.
■ Very low level gate drive requirements allowing direct
   operation in 3V circuits. VGS(th) < 1.5 V.
■ Gate-Source Zener for ESD ruggedness.
   >6kV Human Body Model
■ Replace multiple NPN digital transistors (IMHxA series)
   with one DMOS FET.