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74V1G77 Datasheet - STMicroelectronics

74V1G77 image

Part Name
74V1G77

Other PDF
  2001  

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page
10 Pages

File Size
124 kB

MFG CO.
ST-Microelectronics
STMicroelectronics 

DESCRIPTION
The 74V1G77 is an advanced high-speed CMOS SINGLE D-TYPE LATCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is designed to operate from 2V to 5.5V, making this device ideal for portable applications.
   
■ HIGH SPEED: tPD = 4.4ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
    ICC = 1µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
    VNIH = VNIL = 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY
   

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