CS493263-CL View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS493263-CL Datasheet PDF : 90 Pages
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DAO Data Format Of
AUDATA0, 1, 2 (or AUDATA0 Hex
B Value for Multichannel Modes) Message
22
Multichannel (2 channel)
0x80027F
20-bit Left Justified
0xFC7FFF
(SCLK must be at least 128Fs 0x80017F
for this mode)
0x018000
(Configuration of AUDATA3 as S/PDIF 0x80027C
(IEC60958) or Digital Audio in the
format of I2S or Left Justified is
covered in AN162 and AN163)
0xF01F00
0x80017C
0x001300
24
Multichannel (4 channel)
0x80027F
20-bit Left Justified
0xFC7FFF
(SCLK must be at least 128Fs 0x80017F
for this mode)
0x010000
(Configuration of AUDATA3 as S/PDIF 0x80027C
(IEC60958) or Digital Audio in the
format of I2S or Left Justified is
covered in AN162 and AN163)
0xF01F00
0x80017C
0x001300
3
Multichannel (6 channel)
0x80027F
24-bit Left Justified
0xFC7FFF
(SCLK must be at least 256Fs 0x80027C
for this mode)
0xF01F00
(Configuration of AUDATA3 as S/PDIF 0x80027D
(IEC60958) or Digital Audio in the
format of I2S or Left Justified is
covered in AN162 and AN163)
0xF01F00
0x80027E
0xF01F00
32
Multichannel (2 channel)
0x80027F
24-bit Left Justified
0xFC7FFF
(SCLK must be at least 128Fs 0x80027C
for this mode)
0xF01F00
(Configuration of AUDATA3 as S/PDIF 0x80017F
(IEC60958) or Digital Audio in the
format of I2S or Left Justified is
0x018000
covered in AN162 and AN163)
34
Multichannel (4 channel)
0x80027F
24-bit Left Justified
0xFC7FFF
(SCLK must be at least 128Fs 0x80017F
for this mode)
0x010000
(Configuration of AUDATA3 as S/PDIF 0x80027C
(IEC60958) or Digital Audio in the
format of I2S or Left Justified is
0xF01F00
covered in AN162 and AN163)
Table 23. Output Data Format Configuration
(Parameter B) (Continued)
CS49300 Family DSP
C Value
MCLK Frequency
0
256Fs
(default)
1
512Fs
2
128Fs
3
384Fs
(SCLK must be 64Fs in this
mode and MCLK must be an
input)
Hex
Message
0x80027F
0xFFE7FF
0x80027F
0xFFE7FF
0x80017F
0x001000
0x80027F
0xFFE7FF
0x80017F
0x001800
0x80027F
0xFFE7FF
0x80017F
0x000800
Table 24. Output MCLK Configuration
(Parameter C)
D Value
SCLK Frequency
0
64Fs
(default)
1
128Fs
2
256Fs
Hex
Message
0x80027F
0xFFF8FF
0x80017F
0x000100
0x80027F
0xFFF8FF
0x80017F
0x000200
0x80027F
0xFFF8FF
0x80017F
0x000300
Table 25. Output SCLK Configuration
(Parameter D)
E Value
SCLK Polarity
0
Data Valid on Rising Edge
(default) (clocked out on falling)
1
Data Valid on Falling Edge
(clocked out on rising)
Hex
Message
0x80027F
0xF7FFFF
0x80017F
0x080000
Table 26. Output SCLK Polarity Configuration
(Parameter E)
DS339F7
79
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