CS493115 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS493115

Multi-Standard Audio Decoder Family

Cirrus Logic 

RESET(LOW) (NOTE 1)

WRITE_*(DOWNLOAD_

BOOT, MSG_SIZE)

RESET(HIGH) (NOTE 2)

CS49300 Family DSP

WAIT 500 µs

TIMEOUT AFTER

20MS (NOTE 3)

N

INTREQ LOW?

Y

READ_*(MESSAGE)

WRITE_*(GFABTX.LD FILE,

DOWNLOAD FILE SIZE)

MESSAGE ==

N

BOOTSTART?

EXIT(ERROR)

WAIT 135 MS, 100 MS,

OR 70 MS (NOTE 5)

READ_*(VARIABLE)

(NOTE 4)

N

CORRECT VALUE?

Y

AUTOBOOT COMPLETE

WRITE_*(HW_CONFIG_MSG,

HW_MSG_SIZE)

(NOTE 6)

WRITE_*(SW_CONFIG_MSG,

SW_MSG_SIZE)

(NOTE 6)

WRITE_*(KICKSTART,

MSG_SIZE)

(NOTE 6)

Y

Notes: 1. RESET must be held LOWTrstl.

WAIT 5 MS

2. It should be noted that mode pins are used

to configure the CS493XX serial

communication mode. These mode pins are

latched internally on the rising edge of reset.

The pins can be set dynamically by a

microprocessor or can be statically pulled

HIGH or LOW. If these pins are driven

dynamically, setup and hold times must be

satisfied as stated in the CS493XX Data

Sheet. More information about the function

of the mode pins can be found in the

CS493XX Data Sheet and in Section 6,

“Control” on page 36.

3. Time-out values reflect worst case response

time for the CS493XX. The values shown

may be used for the host’s time-out control

loop.

4. Hardware configuration messages are

covered in Section 6, “Control” on page 36.

Application configuration messages are

covered in each application code user’s

manual.

5. INTREQ should be ignored during this

period. Depending on which GFABT code is

used, wait times can vary from 135 ms to 70

ms. All actual Autoboot times should be

verified by the designer.

6. The READ_* and WRITE_* functions are

placeholders for the READ_I2C/READ_SPI

and WRITE_I2C/WRITE_SPI functions

defined in Section 6.1, “Serial

Communication” on page 36.

Figure 38. Fast Autoboot Sequence Using GFABT Codes

62

DS339F7

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