LTC6900CS5 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC6900CS5 Datasheet PDF : 12 Pages
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LTC6900
PIN FUNCTIONS
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply
must be kept free from noise and ripple. It should be by-
passed directly to a ground plane with a 0.1μF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC6900 to approximately 1.1V below the V+
voltage. For best performance, use a precision metal film
resistor with a value between 10kΩ and 2MΩ and limit
the capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
of N in the frequency equation. Pin 4 should be tied to GND
for the ÷1 setting, the highest frequency range. Floating
Pin 4 divides the master oscillator by 10. Pin 4 should be
tied to V+ for the ÷100 setting, the lowest frequency range.
To detect a floating DIV pin, the LTC6900 attempts to pull
the pin toward midsupply. Therefore, driving the DIV pin
high requires sourcing approximately 2μA. Likewise, driv-
ing DIV low requires sinking 2μA. When Pin 4 is floated,
it should preferably be bypassed by a 1nF capacitor to
ground or it should be surrounded by a ground shield to
prevent excessive coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ and/
or 10pF loads. Heavier loads may cause inaccuracies due
to supply bounce at high frequencies. Voltage transients,
coupled into Pin 5, above or below the LTC6900 power
supplies will not cause latchup if the current into/out of
the OUT pin is limited to 50mA.
BLOCK DIAGRAM
RSET
V+
1
IRES
SET
3
VBIAS
2 GND
VRES = (V+ – VSET) = 1.1V TYPICALLY
+
GAIN = 1
–
MASTER OSCILLATOR
ƒMO
=
10MHz
•
20kΩ
•
IRES
(V+ – VSET)
IRES
PATENT PENDING
PROGRAMMABLE
DIVIDER (N)
(÷1, 10 OR 100)
DIVIDER
SELECT
+–
THREE-STATE
INPUT DETECT
OUT
5
V+
2μA
DIV
4
+–
2μA
GND
6900 BD
6900fa
5
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