CS8900-CQ View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS8900-CQ Datasheet PDF : 132 Pages
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CS8900
Offset
0000h
0002h
0004h
0006h
0008h
000Ah
000Ch
000Eh
Type
Read/Write
Read/Write
Write-only
Write-only
Read-only
Read/Write
Read/Write
Read/Write
Description
Receive/Transmit Data (Port 0)
Receive/Transmit Data (Port 1)
TxCMD (Transmit Command)
TxLength (Transmit Length)
Interrupt Status Queue
PacketPage Pointer
PacketPage Data (Port 0)
PacketPage Data (Port 1)
Table 4.5. I/O Mode Mapping
Ports 0 and 1 are used for 32-bit operations
(lower-order word in Port 0).
TxCMD Port
The host writes the Transmit Command
(TxCMD) to this port at the start of each trans-
mit operation. The Transmit Command tells the
CS8900 that the host has a frame to be transmit-
ted, as well as how that frame should be
transmitted. This port is mapped into PacketPage
base + 0144h. See Register 9 in Section 4.4 for
more information.
TxLength Port
The length of the frame to be transmitted is writ-
ten here immediately after the Transmit
Command is written. This port is mapped into
PacketPage base + 0146h.
Interrupt Status Queue Port
This port contains the current value of the Inter-
rupt Status Queue (ISQ). The ISQ is located at
PacketPage base + 0120h. For a more detailed
description of the ISQ, see Section 5.1.
PacketPage Pointer Port
The PacketPage Pointer Port is written whenever
the host wishes to access any of the CS8900’s
internal registers. The first 12 bits (bits 0 through
B) provide the internal address of the target reg-
DS150PP2
ister to be accessed during the current operation.
The next three bits (C, D, and E) must be 0. The
last bit (Bit F) indicates whether or not the Pack-
etPage Pointer should be auto-incremented to the
next word location. Figure 4.4 shows the struc-
ture of the PacketPage Pointer.
PacketPage Data Ports 0 and 1
The PacketPage Data Ports are used to transfer
data to and from any of the CS8900’s internal
registers. Port 0 is used for 16-bit operations and
Port 0 and 1 are used for 32-bit operations
(lower-order word in Port 0).
I/O Mode Operation
For an I/O Read or Write operation, the AEN pin
must be low, and the 16-bit I/O address on the
ISA System Address bus (SA0 - SA15) must
match the address space of the CS8900. For a
Read, the IOR pin must be low, and for a Write,
the IOW pin must be low.
Note: The ISA Latchable Address Bus (LA17 -
LA23) is not needed for applications that use
only I/O Mode and Receive DMA operation. For
these applications, the ELCS pin is tied low.
I/O base + 000Bh
I/O base + 000Ah
F EDCBA9 8 7 6 5 4 3 2 1 0
000
PacketPage Register Address
Bit F: 0 = Pointer remains fixed
1 = Auto-Increments to next word location
Figure 4.4. PackagePage Pointer
75
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