CRD8900-1 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CRD8900-1

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

Bus Interface Register:

RxDMA Byte Count (Read only)

Address 002Bh

Most-significant byte of byte count.

Address: PacketPage base + 002Ah

Address 002Ah

Least-significant byte of byte count.

The RxDMA Byte Count register describes the valid number of bytes DMAed since the last readout. See Section

5.4.

This register’s initial state after reset is: 0000 0000 0000 0000

Bus Interface Register:

Memory Base Address (Read/Write)

Address 002Fh

Address 002Eh

Reserved

The most-significant nibble of

memory base address. The

high-order nibble is reserved.

Address: PacketPage base + 002Ch

Address 002Dh

Address 002Ch

Contains portion of memory The least-significant byte of the

base address.

memory base address.

Memory Base Address: The lower three bytes (002Ch, 002Dh, and 002Eh) are used for the 20-bit memory

base address. The upper three nibbles are reserved.

After reset, if no EEPROM is found by the CS8900, then the register has the following initial state. If an

EEPROM is found, then the register’s initial value may be set by the EEPROM. See Section 3.3.

XXXX XXXX XXXX 0000 0000 0000 0000 0000

DS150PP2

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