AT89C51CC03C-RLTIM View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

AT89C51CC03C-RLTIM

Enhanced 8-bit MCU with CAN Controller and Flash Memory

Atmel Corporation 

AT89C51CC03

Serial I/O Port

The AT89C51CC03 I/O serial port is compatible with the I/O serial port in the 80C52.

It provides both synchronous and asynchronous communication modes. It operates as a

Universal Asynchronous Receiver and Transmitter (UART) in three full-duplex modes

(Modes 1, 2 and 3). Asynchronous transmission and reception can occur simultaneously

and at different baud rates

Serial I/O port includes the following enhancements:

• Framing error detection

• Automatic address recognition

Figure 31. Serial I/O Port Block Diagram

IB Bus

TXD

Write SBUF

SBUF

Transmitter

Mode 0 Transmit

Read SBUF

SBUF

Receiver

Load SBUF

RXD

Receive

Shift register

Serial Port

Interrupt Request

RI TI

SCON reg

Framing Error Detection Framing bit error detection is provided for the three asynchronous modes. To enable the

framing bit error detection feature, set SMOD0 bit in PCON register.

Figure 32. Framing Error Block Diagram

SM0/FE SM1 SM2 REN TB8 RB8 TI

RI

Set FE bit if stop bit is 0 (framing error)

SM0 to UART mode control

SMOD SMOD0 -

POF GF1 GF0 PD IDL

To UART framing error control

When this feature is enabled, the receiver checks each incoming data frame for a valid

stop bit. An invalid stop bit may result from noise on the serial lines or from simultaneous

transmission by two CPUs. If a valid stop bit is not found, the Framing Error bit (FE) in

SCON register bit is set.

The software may examine the FE bit after each reception to check for data errors.

Once set, only software or a reset clears the FE bit. Subsequently received frames with

63

4182K–CAN–05/06

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