CS5376-BS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5376-BS

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

Power Supply Connections

VDD1 - Positive Digital Power Supply, pin 54

Positive supply voltage for the communication interface. The communication interface includes

the JTAG pins (1, 2, 3, 4, 5), the serial data output pins (60, 61, 62, 63, 64), the serial port

interface 1 pins (47, 48, 49, 50, 51, 52), the GPIO 6-11 pins (41, 42, 43, 44, 45, 46), and

control signals RESET, BOOT, TIMEB, CLK, SYNC pins (55, 56, 57, 58, 59).

VDD2 - Positive Digitial Power Supply, pins 11, 25

Positive supply voltage for the modulator interface. The modulator interface includes the test

bit stream generator pins (8, 9), the modulator data output pins (12, 13, 14, 15, 16, 17, 18, 19,

20, 21, 22), the serial port interface 2 pins (26, 27, 28, 29, 30, 31), and the GPIO 0-5 pins (32,

33, 34, 35, 36, 37).

VD - Positive Digitial Power Supply, pins 7, 40

Positive supply voltages for the CS5376 logic core.

GND1, GND2, GND - Digital Ground, pin 53, 24, 38, 6, 23, 39

Reset Control

RESET - Reset, pin 55

Active low input. When low, the CS5376 is in a reset state.

BOOT - Boot mode selection, pin 56

Input signal sampled 1 µs after RESET is de-asserted. If low, the CS5376 boots in coprocessor

mode; if high, the CS5376 boots in stand-alone mode.

Clock and Synchronization

CLK - Clock Input, pin 58

Clock input, 32.768 MHz. All internal clocks, MCLK, MCLK/2, SPI 1 clock, SPI2 clock, and

TBSCLK are generated from CLK.

SYNC - Device Synchronization Input Signal, pin 59

Input synchronization signal. MSYNC is generated from a rising edge on this pin to

synchronize the modulators, sinc filter, and decimation engine.

TIMEB - Time Break, pin 57

Time Break input. Signals the Decimation Engine to set the time break (TB) flag in the output

status word for the sample representing the current sampling instant.

DS256PP1

116

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