CS5376-BS View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5376-BS Datasheet PDF : 122 Pages
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17.2.7 FILT_CFG - 0x20
CS5376
Figure 76. Filter Configuration Register FILT_CFG
(MSB) 23
22
--
--
R/W
R/W
0
0
21
20
--
EXP4
R/W
R/W
0
0
15
14
13
12
--
ORCAL
USEOR
USEGR
R/W
R/W
R/W
R/W
0
0
0
0
7
6
5
4
--
DEC2
DEC1
DEC0
R/W
R/W
R/W
R/W
0
0
0
0
19
EXP3
R/W
0
11
--
R/W
0
3
--
R/W
0
18
EXP2
R/W
0
10
FSEL2
R/W
0
2
--
R/W
0
17
EXP1
R/W
0
9
FSEL1
R/W
0
1
CH1
R/W
0
16
EXP0
R/W
0
8
FSEL0
R/W
0
(LSB) 0
CH0
R/W
0
I/O Address: 0x20
--
Not defined;
read as 0
R
Readable
W
Writable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Bit definitions:
23:21 --
reserved
15 --
reserved
7 --
reserved
21:16 EXP[4:0] DC Offset Calibration 14
Routine Exponent
(Determines sensitivity
of DC offset calibration
routine)
13
12
11
ORCAL
Offset Register Calibra- 6:4
tion Routine Enable
1: enabled
0: disabled
USEOR
USEGR
[11:8]
Use Offset Register Cor- 3:2
rection
1: enabled
0: disabled
Use Gain Register Cor- 1:0
rection
1: enabled
0: disabled
--
reserved
DEC[2:0]
--
Decimation Rate, Output
Word Rate
111: 4 kHz
110: 2 kHz
101: 1 kHz
100: 500 Hz
011: 333.3 Hz
010: 250 Hz
001: 125 Hz
000: 62.5 Hz
reserved
CH[1:0]
Channel Enable
11: 3 Channel (1, 2, 3)
10: 2 Channel (1, 2)
01: 1 Channel (1 only)
00: 4 Channel (1, 2, 3, 4)
10:8 FSEL[2:0] Output Filter Select
111: reserved
110: reserved
101: IIR 3rd Order
100: IIR 2nd Order
011: IIR 1st Order
010: FIR2 Output
001: FIR1 Output
000: Sinc Output
DS256PP1
106
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