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CS42438-DMZR View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS42438-DMZR
Cirrus-Logic
Cirrus Logic 
CS42438-DMZR Datasheet PDF : 64 Pages
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7.3 POWER CONTROL (ADDRESS 02H)
7
PDN_ADC3
6
PDN_ADC2
5
PDN_ADC1
4
PDN_DAC4
3
PDN_DAC3
2
PDN_DAC2
1
PDN_DAC1
0
PDN
7.3.1 POWER DOWN ADC PAIRS(PDN_ADCX)
Default = 0
0 - Disable
1 - Enable
Function:
When enabled, the respective ADC channel pair (ADC1 - AIN1/AIN2; ADC2 - AIN3/AIN4; and ADC3
- AIN5/AIN6) will remain in a reset state.
7.3.2 POWER DOWN DAC PAIRS (PDN_DACX)
Default = 0
0 - Disable
1 - Enable
Function:
When enabled, the respective DAC channel pair (DAC1 - AOUT1/AOUT2; DAC2 - AOUT3/AOUT4;
DAC3 - AOUT5/AOUT6; and DAC4 - AOUT7/AOUT8) will remain in a reset state. It is advised that
any change of these bits be made while the DACs are muted or the power down bit (PDN) is enabled
to eliminate the possibility of audible artifacts.
7.3.3 POWER DOWN (PDN)
Default = 0
0 - Disable
1 - Enable
Function:
The entire device will enter a low-power state when this function is enabled. The contents of the con-
trol registers are retained in this mode.
DS646PP2
43

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