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DSPIC33FJ32GS610-I/PF View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
DSPIC33FJ32GS610-I/PF Datasheet PDF : 456 Pages
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TABLE 4-13: OUTPUT COMPARE REGISTER MAP
SFR
Name
SFR
Addr.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
OC1RS
OC1R
OC1CON
OC2RS
OC2R
OC2CON
OC3RS
OC3R
OC3CON
OC4RS
OC4R
OC4CON
Legend:
0180
Output Compare 1 Secondary Register
0182
Output Compare 1 Register
0184
OCSIDL
0186
Output Compare 2 Secondary Register
0188
Output Compare 2 Register
018A
OCSIDL
018C
Output Compare 3 Secondary Register
018E
Output Compare 3 Register
0190
OCSIDL
0192
Output Compare 4 Secondary Register
0194
Output Compare 4 Register
0196
OCSIDL
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 5
Bit 4
Bit 3
OCFLT OCTSEL
OCFLT OCTSEL
OCFLT OCTSEL
OCFLT OCTSEL
Bit 2
Bit 1
Bit 0
All
Resets
OCM<2:0>
OCM<2:0>
OCM<2:0>
OCM<2:0>
xxxx
xxxx
0000
xxxx
xxxx
0000
xxxx
xxxx
0000
xxxx
xxxx
0000
TABLE 4-14: QEI1 REGISTER MAP
SFR
Name
SFR
Addr.
Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7
Bit 6
Bit 5
QEI1CON
01E0 CNTERR
QEISIDL INDX UPDN
QEIM<2:0>
SWPAB PCDOUT TQGATE
DFLT1CON 01E2
IMV<1:0>
CEID QEOUT
QECK<2:0>
POS1CNT
01E4
Position Counter<15:0>
MAX1CNT
01E6
Maximum Count<15:0>
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 4
Bit 3
TQCKPS<1:0>
Bit 2
Bit 1
Bit 0
POSRES TQCS UPDN_SRC
All
Resets
0000
0000
0000
FFFF
TABLE 4-15: QEI2 REGISTER MAP
SFR
Name
SFR
Addr.
Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7
Bit 6
Bit 5
QEI2CON
01F0 CNTERR
QEISIDL INDX UPDN
QEIM<2:0>
SWPAB PCDOUT TQGATE
DFLT2CON 01F2
IMV<1:0> CEID QEOUT
QECK<2:0>
POS2CNT
01F4
Position Counter<15:0>
MAX2CNT
01F6
Maximum Count<15:0>
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 4
Bit 3
TQCKPS<1:0>
Bit 2
Bit 1
Bit 0
POSRES TQCS UPDN_SRC
All
Resets
0000
0000
0000
FFFF

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