CS61575-IP1 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS61575-IP1

T1/E1 Line Interface

Cirrus Logic 

CS61574A CS61575

APPLICATIONS

+ 68 µF

+5V

0.1 µF

+

1.0 µF +5V

Control

&

Monitor

Frame

Format

Encoder/

Decoder

XTL

RGND

21

15

TGND

28 CLKE

RV+ TV+ SCLK 27

1 ACLKI

CS 26

12 LOS

INT 23

11 DPM

SDI 24

RV+

5

7

6

8

MODE

RPOS

RNEG

RCLK

3 TPOS

CS61574A

OR

CS61575

IN

HOST

MODE

SDO 25

RTIP 19

RRING 20

4 TNEG

2 TCLK

MTIP 17

MRING 18

9 XTALIN

TRING 16

10 XTALOUT RGND TGND TTIP 13

22

14

100 kΩ

µP

Serial

Port

1

R1

3

R2

5

2

RECEIVE

6 LINE

2CT:1

PE-65351

0.47 µF

2

1

6

5

1:1.15

PE-65388

TRANSMIT

LINE

Figure A1. T1 Host Mode Configuration

Frequency

MHz

1.544 (T1)

2.048 (E1)

Cable

Ω

100

120

75

R1 and R2

Ω

200

240

150

Transmit

Transformer

1:1.15

1:1.26

1:1

Crystal

XTL

CXT6176

CXT8192

Table A1. External Component Values

Line Interface

Figures A1-A3 show typical T1 and E1 line inter-

face application circuits. Table A1 shows the

external components which are specific to each

application. Figure A1 illustrates a T1 interface in

the Host Mode. Figure A2 illustrates a 120 Ω E1

interface in the Hardware Mode. Figure A3 illus-

trates a 75 Ω E1 interface in the Extended

Hardware Mode

The receiver transformer has a grounded center

tap on the IC side. Resistors between the RTIP

and RRING pins to ground provide the termina-

tion for the receive line.

The transmitter transformer matches the 75 Ω

transmitter output impedance to the line imped-

ance. Figures A1-A3 show a 0.47 µF capacitor in

series with the transmit transformer primary. This

capacitor is needed to prevent any output stage

imbalance from resulting in a DC current through

the transformer primary. This current might satu-

rate the transformer producing an output offset

level shift.

28

DS154F2

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