CS61574A(2009) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS61574A
(Rev.:2009)

T1/E1 Line Interface

Cirrus Logic 

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CS61574A CS61575

APPLICATIONS

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Figure A1. T1 Host Mode Configuration

Frequency

MHz

1.544 (T1)

2.048 (E1)

Cable

Ω

100

120

75

R1 and R2 Transmit Crystal

Ω

Transformer XTL

200

1:1.15 6.176 MHz

240

1:1.26 8.192 MHz

150

1:1

Table A1. External Component Values

Line Interface

Figures A1-A3 show typical T1 and E1 line inter-

face application circuits. Table A1 shows the

external components which are specific to each

application. Figure A1 illustrates a T1 interface in

the Host Mode. Figure A2 illustrates a 120 Ω E1

interface in the Hardware Mode. Figure A3 illus-

trates a 75 Ω E1 interface in the Extended

Hardware Mode

The receiver transformer has a grounded center

tap on the IC side. Resistors between the RTIP

and RRING pins to ground provide the termina-

tion for the receive line.

The transmitter transformer matches the 75 Ω

transmitter output impedance to the line imped-

ance. Figures A1-A3 show a 0.47 μF capacitor in

series with the transmit transformer primary. This

capacitor is needed to prevent any output stage

imbalance from resulting in a DC current through

the transformer primary. This current might satu-

rate the transformer producing an output offset

level shift.

28

DS154F3

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