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ST72F324K6TCRS View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST72F324K6TCRS Datasheet PDF : 194 Pages
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ST72324xx-Auto
Electrical characteristics
12.13.2 General PCB design guidelines
To obtain best results, some general design and layout rules should be followed when
designing the application PCB to shield the noise-sensitive, analog physical interface from
noise-generating CMOS logic signals.
Use separate digital and analog planes. The analog ground plane should be connected
to the digital ground plane via a single point on the PCB.
Filter power to the analog power planes. It is recommended to connect capacitors, with
good high frequency characteristics, between the power and ground lines, placing
0.1µF and optionally, if needed, 10pF capacitors as close as possible to the ST7 power
supply pins and a 1 to 10µF capacitor close to the power source (see Figure 88).
The analog and digital power supplies should be connected in a star network. Do not
use a resistor, as VAREF is used as a reference voltage by the A/D converter and any
) resistance would cause a voltage drop and a loss of accuracy.
t(s Properly place components and route the signal traces on the PCB to shield the analog
c inputs. Analog signals paths should run over the analog ground plane and be as short
u as possible. Isolate analog signals from digital signals that may switch while the analog
d inputs are being sampled by the A/D converter. Do not toggle digital outputs on the
ro same I/O port as the A/D input being converted.
te P Figure 88. Power supply filtering
ole 1 to 10µF
- Obs VDD
ST7
digital noise
+ filtering
t(s) Power
supply
Obsolete Producsource
External
noise
filtering
0.1µF
ST72XXX
VSS
VDD
0.1µF
VAREF
VSSA
Doc ID 13841 Rev 1
173/193

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