AD7872JRZ-REEL View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
AD7872JRZ-REEL Datasheet PDF : 24 Pages
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Data Sheet
THEORY OF OPERATION
CONVERTER DETAILS
The AD7871/AD7872 is a complete 14-bit ADC, requiring no
external components apart from power supply decoupling
capacitors. It is comprised of a 14-bit successive approximation
ADC based on a fast settling voltage-output DAC, a high speed
comparator and CMOS SAR, a track-and-hold amplifier, a 3 V
buried Zener reference, a clock oscillator, and control logic.
INTERNAL REFERENCE
The AD7871/AD7872 have an on-chip temperature
compensated buried Zener reference that is factory trimmed to
3 V ± 0 mV. Internally it provides both the DAC reference and
the dc bias required for bipolar operation. Reference noise is
minimized by connecting a capacitor between CREF and AGND.
For specified operation this capacitor should be 10 nF. The
reference output is available (REF OUT) and capable of
providing up to 500 μA to an external load.
The maximum recommended capacitance on REF OUT for
normal operation is 50 pF. If the reference is required for use
external to the AD7871/AD7872, decouple it with a 200 Ω
resistor in series with a parallel combination of a 10 μF
tantalum capacitor and a 0.1 μF ceramic capacitor. These
decoupling components are required to remove voltage spikes
caused by the internal operation of the AD7871/AD7872.
CREF
VDD
AD7871/AD7872
TEMPERATURE
COMPENSATION
VSS
REF OUT
Figure 8. Reference Circuit
TRACK-AND-HOLD AMPLIFIER
The track-and-hold amplifier on the analog input of the
AD7871/AD7872 allows the ADC to accurately convert an
input sine wave of 6 V peak-peak amplitude to 14-bit accuracy.
The input bandwidth of the track-and-hold amplifier is much
greater than the Nyquist rate of the ADC even when the ADC is
operated at its maximum throughput rate. The 0.1 dB cutoff
frequency occurs typically at 500 kHz. The track-and-hold
amplifier acquires an input signal to 14-bit accuracy in less than
2 μs. The overall throughput rate is determined by the
conversion time plus the track-and-hold amplifier acquisition
time. For a 2 MHz input clock, the throughput time is 12 μs
maximum.
AD7871/AD7872
The operation of the track-and-hold amplifier is essentially
transparent to the user. The track-and-hold amplifier goes from
its tracking mode to its hold mode at the start of conversion. If
the CONVST input is used to start conversion, then the track to
hold transition occurs on the rising edge of CONVST. If CS on
the AD7871 starts conversion, this transition occurs on the
falling edge of CS.
ANALOG INPUT
Figure 9 shows the AD7871/AD7872 analog input. The analog
input range is ±3 V into an input resistance of typically 15 kΩ.
The designed code transitions occur midway between succes-
sive integer LSB values (that is, 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . .
FS −3/2 LSBs). The output code is twos-complement binary
with 1 LSB = FS/16384 = 6 V/16384 = 366 μV. The ideal
input/output transfer function is shown in Figure 10.
AD7871/AD7872
7.5kΩ
TRACK-AND-HOLD
AMPLIFIER
TO INTERNAL
COMPARATOR
7.5kΩ
TO INTERNAL
3V REFERENCE
Figure 9. Analog Input
OUTPUT
CODE
011…111
011…110
000…110
000…001
–FS
2
000…000
111…111
111…110
100…001
100…000
+FS
2
–
1LSB
FS = 6V
1LSB
=
FS
16384
0V
INPUT VOLTAGE
Figure 10. Bipolar Input/Output Transfer Function
Rev. E | Page 9 of 24
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