STM32F031x4 STM32F031x6
Electrical characteristics
Table 60. I2S characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
tsu(SD_MR) Data input setup time
Master receiver
6
tsu(SD_SR)
Slave receiver
2
th(SD_MR)(2)
th(SD_SR)(2)
Data input hold time
Master receiver
Slave receiver
4
0.5
tv(SD_MT)(2)
tv(SD_ST)(2)
Data output valid time
Master transmitter
Slave transmitter
-
-
th(SD_MT)
Data output hold time
Master transmitter
0
th(SD_ST)
Slave transmitter
13
1. Data based on design simulation and/or characterization results, not tested in production.
2. Depends on fPCLK. For example, if fPCLK = 8 MHz, then TPCLK = 1/fPLCLK = 125 ns.
Max
-
-
-
-
4
20
-
-
Figure 29. I2S slave timing diagram (Philips protocol)
WF&.
&32/
Unit
ns
&32/
:6LQSXW
6'WUDQVPLW
6'UHFHLYH
WZ&.+
WZ&./
WK:6
WVX:6
/6%WUDQVPLW
WVX6'B65
/6%UHFHLYH
06%WUDQVPLW
06%UHFHLYH
WY6'B67
%LWQWUDQVPLW
WK6'B65
%LWQUHFHLYH
WK6'B67
/6%UHFHLYH
06Y9
1. Measurement points are done at CMOS levels: 0.3 × VDDIOx and 0.7 × VDDIOx.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
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