ST72633K1M1 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST72633K1M1

LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C

STMicroelectronics 

ST7263

I²C BUS INTERFACE (Cont’d)

Figure 40. Transfer Sequencing

Slave Receiver

S Address A

Data1 A

EV1

Data2

EV2

A

DataN

.....

EV2

A

P

EV2

EV4

Slave Transmitter

S Address A

Data1

EV1 EV3

A

Data2

EV3

A

DataN

.....

EV3

NA

P

EV3-1 EV4

Master Receiver

S

Address A

EV5

EV6

Data1

A

Data2

EV7

A

.....

EV7

DataN NA

P

EV7

Master Transmitter

S

Address A

EV5

EV6 EV8

Data1

A

Data2

EV8

A

.....

EV8

DataN

A

P

EV8

Legend:

S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge

EVx=Event (with interrupt if ITE=1)

EV1: EVF=1, ADSL=1, cleared by reading the SR1 register.

EV2: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR register.

EV3: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR register.

EV3-1: EVF=1, AF=1, BTF=1; AF is cleared by reading the SR1 register. The BTF is cleared

by releasing the lines (STOP=1, STOP=0) or by writing the DR register (DR=FFh).

Note: If lines are released by STOP=1, STOP=0, the subsequent EV4 is not seen.

EV4: EVF=1, STOPF=1, cleared by reading the SR2 register.

EV5: EVF=1, SB=1, cleared by reading the SR1 register followed by writing the DR register.

EV6: EVF=1, cleared by reading the SR1 register followed by writing the CR register

(for example PE=1).

EV7: EVF=1, BTF=1, cleared by reading the SR1 register followed by reading the DR register.

EV8: EVF=1, BTF=1, cleared by reading the SR1 register followed by writing the DR register.

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