I/O PORTS (Cont’d)
Table 9. I/O Configurations
PAD
PAD
ST7LITE1xB
Hardware Configuration
DR REGISTER ACCESS
DR
W
REGISTER
R
DATA BUS
FROM
OTHER
PINS
ALTERNATE INPUT
To on-chip peripheral
EXTERNAL INTERRUPT
SOURCE (eix)
INTERRUPT COMBINATIONAL POLARITY
CONDITION
LOGIC SELECTION
ANALOG INPUT
DR REGISTER ACCESS
DR
R/W
REGISTER
DATA BUS
PAD
DR REGISTER ACCESS
DR
R/W
REGISTER
DATA BUS
ALTERNATE
ENABLE
BIT
ALTERNATE
OUTPUT
From on-chip peripheral
Notes:
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
reading the DR register will read the alternate function output status.
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
the alternate function reads the pin status given by the DR register content.
51/157
1