
PIC16F913/914/916/917/946
FIGURE 3-28:
BLOCK DIAGRAM OF RE<7:4> (PIC16F946 ONLY)
Data Bus
WR PORTE
WR TRISE
DQ
CK Q
Data Latch
DQ
CK Q
TRIS Latch
RD TRISE
Analog Mode or
SEG<27:24> and LCDEN
Schmitt
Trigger
VDD
I/O Pin
VSS
RD PORTE
SEG<27:24>
AN<7:5>
SEG<27:24> and LCDEN
© 2007 Microchip Technology Inc.
DS41250F-page 79