
PIC16F913/914/916/917/946
FIGURE 3-15:
BLOCK DIAGRAM OF RC1
Data Bus
WR PORTC
WR TRISC
D
Q
CK Q
Data Latch
D
Q
CK Q
TRIS Latch
RD TRISC
(VLCDEN and LMUX<1:0> ≠ 00)
Schmitt
Trigger
RD PORTC
VLCD2
(LCDEN and LMUX<1:0> ≠ 00)
VDD
I/O Pin
VSS
FIGURE 3-16:
BLOCK DIAGRAM OF RC2
Data Bus
WR PORTC
WR TRISC
D
Q
CK Q
Data Latch
D
Q
CK Q
TRIS Latch
RD TRISC
VLCDEN
RD PORTC
VLCD3
VDD
I/O Pin
VSS
Schmitt
Trigger
LCDEN
DS41250F-page 64
© 2007 Microchip Technology Inc.