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RFHCS362F-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
RFHCS362F-I/SO Datasheet PDF : 54 Pages
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rfHCS362G/362F
4.5.12 HEADER
When PWM mode is selected the header length (low
time between preamble and data bits start) can be set
to 10 x TE or 3 x TE. The 10 x TE mode is recommended
for compatibility with previous KEELOQ encoder mod-
els. In Manchester mode, the header length is fixed and
set to 4 x TE.
4.5.13 RFEN
RFEN selects whether the RFEN output is enabled or
disabled. If enabled, S3 is only sampled 2 s after the
last button is released and at the start of the first trans-
mission. If disabled S3 functions the same as the other
S inputs. For typical implementation of the rfHCS362G/
362F the RFEN bit = 0.
4.6 SYNCHRONOUS MODE
In Synchronous mode, the code word can be clocked
out on DATA using S2 as a clock. To enter Synchro-
nous mode, S2 must be taken HIGH and then DATA
and S0 or S1 are taken HIGH. After Synchronous mode
is entered, DATA and S2 must be taken LOW. The data
is clocked out on DATA on every falling edge of S2.
Auto-shutoff timer is not disabled in Synchronous
mode. Refer to Figure 4-1 and Figure 4-2.
FIGURE 4-1:
SYNCHRONOUS TRANSMISSION MODE
TPS TPH1 TPH2
DATA
t = 50ms 35 pulses on S2 Preamble
Header
Data
S2
S0 or S1
“01,10,11”
RFEN
TRFON
FIGURE 4-2:
CODE WORD ORGANIZATION (SYNCHRONOUS TRANSMISSION MODE)
Fixed Portion
Encrypted Portion
QUEUE CRC Vlow Button
(2 bits) (2 bits) (1-bit) Status
S2 S1 S0 S3
MSb
Serial Number
(28 bits)
Button
Status
S2 S1 S0 S3
DISC+ OVR Sync Counter
(12 bits)
(16 bits)
69 Data bits
LSb
Transmitted
LSb first.
DS41189B-page 24
© 2011 Microchip Technology Inc.

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