3804 Group (Spec. H)
b7
b0 Interrupt edge selection register
(INTEDGE : address 003A16)
INT0 active edge selection bit
INT1 active edge selection bit
Not used (returns “0” when read)
INT2 active edge selection bit
INT3 active edge selection bit
INT4 active edge selection bit
INT0, INT4 interrupt switch bit
0 : INT00, INT40 interrupt
1 : INT01, INT41 interrupt
Not used (returns “0” when read)
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
b7
b0 Interrupt request register 1
b7
b0 Interrupt request register 2
(IREQ1 : address 003C16)
(IREQ2 : address 003D16)
INT0/Timer Z interrupt request bit
INT1 interrupt request bit
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit/SCL, SDA interrupt
request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
CNTR0/SCL, SDA interrupt request bit
CNTR1/Serial I/O3 receive interrupt
request bit
Serial I/O2/Timer Z interrupt request bit
INT2/I2C interrupt request bit
INT3 interrupt request bit
INT4/CNTR2 interrupt request bit
AD converter/Serial I/O3 transmit
interrupt request bit
Not used (returns “0” when read)
0 : No interrupt request issued
1 : Interrupt request issued
b7
b0
Interrupt control register 1
b7
b0 Interrupt control register 2
(ICON1 : address 003E16)
(ICON2 : address 003F16)
INT0/Timer Z interrupt enable bit
INT1 interrupt enable bit
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit/SCL, SDA interrupt
enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
CNTR0/SCL, SDA interrupt enable bit
CNTR1/Serial I/O3 receive interrupt
enable bit
Serial I/O2/Timer Z interrupt enable bit
INT2/I2C interrupt enable bit
INT3 interrupt enable bit
INT4/CNTR2 interrupt enable bit
AD converter/Serial I/O3 transmit
interrupt enable bit
Not used (returns “0” when read)
b7
b0
Interrupt source selection register
(INTSEL: address 003916)
0 : Interrupts disabled
1 : Interrupts enabled
INT0/Timer Z interrupt source selection bit
0 : INT0 interrupt
1 : Timer Z interrupt
Serial I/O2/Timer Z interrupt source selection bit
(Do not write “1” to these bits simultaneously.)
0 : Serial I/O2 interrupt
1 : Timer Z interrupt
Serial I/O1 transmit/SCL, SDA interrupt source selection bit
0 : Serial I/O1 transmit interrupt
1 : SCL, SDA interrupt
CNTR0/SCL, SDA interrupt source selection bit
(Do not write “1” to these bits simultaneously.)
0 : CNTR0 interrupt
1 : SCL, SDA interrupt
INT4/CNTR2 interrupt source selection bit
0 : INT4 interrupt
1 : CNTR2 interrupt
INT2/I2C interrupt source selection bit
0 : INT2 interrupt
1 : I2C interrupt
CNTR1/Serial I/O3 receive interrupt source selection bit
0 : CNTR1 interrupt
1 : Serial I/O3 receive interrupt
AD converter/Serial I/O3 transmit interrupt source selection bit
0 : A/D converter interrupt
1 : Serial I/O3 transmit interrupt
Fig. 20 Structure of interrupt-related registers
Rev.1.01 Jan 25, 2005 page 25 of 114
REJ03B0131-0101Z