Electrical characteristics
STM32F103xx
5.3.3
5.3.4
Embedded reset and power control block characteristics
The parameters given in Table 9 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 7.
Table 9. Embedded reset and power control block characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
PLS[2:0]=000 (rising edge)
PLS[2:0]=000 (falling edge)
PLS[2:0]=001 (rising edge)
PLS[2:0]=001 (falling edge)
PLS[2:0]=010 (rising edge)
PLS[2:0]=010 (falling edge)
PLS[2:0]=011 (rising edge)
VPVD
Programmable voltage
detector level selection
PLS[2:0]=011 (falling edge)
PLS[2:0]=100 (rising edge)
PLS[2:0]=100 (falling edge)
PLS[2:0]=101 (rising edge)
PLS[2:0]=101 (falling edge)
PLS[2:0]=110 (rising edge)
PLS[2:0]=110 (falling edge)
PLS[2:0]=111 (rising edge)
PLS[2:0]=111 (falling edge)
VPVDhyst
VPOR/PDR
PVD hysteresis
Power on/power down reset
threshold
Falling edge
Rising edge
VPDRhyst PDR hysteresis
TRSTTEMPO Reset temporization
2.1 2.18 2.26 V
2 2.08 2.16 V
2.19 2.28 2.37 V
2.09 2.18 2.27 V
2.28 2.38 2.48 V
2.18 2.28 2.38 V
2.38 2.48 2.58 V
2.28 2.38 2.48 V
2.47 2.58 2.69 V
2.37 2.48 2.59 V
2.57 2.68 2.79 V
2.47 2.58 2.69 V
2.66 2.78 2.9 V
2.56 2.68 2.8 V
2.76 2.88 3 V
2.66 2.78 2.9 V
100
mV
1.8 1.88 1.96 V
1.84 1.92 2.0 V
40
mV
1 2.5 4.5 mS
Embedded reference voltage
The parameters given in Table 10 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 7.
Table 10. Embedded internal reference voltage
Symbol
Parameter
Conditions
VREFINT Internal reference voltage
−45°C < TA < +105°C
−45°C < TA < +85°C
Min Typ Max Unit
1.16 1.20 1.26 V
1.16 1.20 1.24 V
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