M38507E8H-SP View Datasheet(PDF) - Renesas Electronics

Part Name

Description

MFG CO.

M38507E8H-SP

8-BIT CISC SINGLE-CHIP MICROCOMPUTER

Renesas Electronics 

APPENDIX

3.5 List of registers

Serial I/O2 control register 1

b7 b6 b5 b4 b3 b2 b1 b0

Serial I/O2 control register 1 (SIO2CON1: address 1516)

b

Name

0 Internal

synchronous clock

1 selection bits

2

3 Serial I/O2 port

selection bit

4 SRDY2 output

enable bit

5 Transfer direction

selection bit

6 Serial I/O2

synchronous

clock selection bit

7 P01/SOUT2,

P02/SCLK2

P-channel output

disable bit

Functions

At reset R W

b2b1b0

0

0 0 0: f(XIN)/8

0 0 1: f(XIN)/16

0 1 0: f(XIN)/32

0

0 1 1: f(XIN)/64

1 1 0: f(XIN)/128

0

1 1 1: f(XIN)/256

0: I/O port (P01, P02)

0

1: SOUT2, SCLK2 signal output

0: I/O port (P03)

0

1: SRDY2 signal output

0: LSB first

0

1: MSB first

0: External clock

0

1: Internal clock

0: CMOS output

0

1: N-channel open-drain

output

Fig. 3.5.3 Structure of Serial I/O2 control register 1

Serial I/O2 control register 2

b7 b6 b5 b4 b3 b2 b1 b0

Serial I/O2 control register 2

(SIO2CON2: address 1616)

b

Name

Functions

0 Optional transfer

bits

b2b1b0

0 0 0: 1 bit

0 0 1: 2 bit

1

0 1 0: 3 bit

0 1 1: 4 bit

1 0 0: 5 bit

2

1 0 1: 6 bit

1 1 0: 7 bit

1 1 1: 8 bit

3 Nothing is arranged for these bits. These are

4 write disabled bits. When these bits are read

5 out, the contents are “0”.

6 Serial I/O2

I/O comparison

signal control bit

0: P43 I/O

1: SCMP2 output

7 SOUT2 pin control

bit (P01)

0: Output active

1: Output high-impedance

At reset R W

1

1

1

0

✕

0

✕

0

✕

0

0

Fig. 3.5.4 Structure of Serial I/O2 control register 2

3850 Group (Spec. H) User’s Manual

3-51

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