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DSPIC33FJ128GP302T-E/SP View Datasheet(PDF) - Microchip Technology

Part Name
Description
MFG CO.
DSPIC33FJ128GP302T-E/SP
Microchip
Microchip Technology 
DSPIC33FJ128GP302T-E/SP Datasheet PDF : 402 Pages
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
3.5 CPU Control Registers
REGISTER 3-1: SR: CPU STATUS REGISTER
R-0
OA
bit 15
R-0
R/C-0
R/C-0
OB
SA(1)
SB(1)
R/W-0(3)
R/W-0(3)
R/W-0(3)
R-0
IPL<2:0>(2)
RA
bit 7
R-0
OAB
R/W-0
N
R/C-0
SAB(4)
R/W-0
OV
R -0
DA
R/W-0
Z
R/W-0
DC
bit 8
R/W-0
C
bit 0
Legend:
C = Clear only bit
S = Set only bit
‘1’ = Bit is set
R = Readable bit
W = Writable bit
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n = Value at POR
x = Bit is unknown
bit 15
OA: Accumulator A Overflow Status bit
1 = Accumulator A overflowed
0 = Accumulator A has not overflowed
bit 14
bit 13
bit 12
OB: Accumulator B Overflow Status bit
1 = Accumulator B overflowed
0 = Accumulator B has not overflowed
SA: Accumulator A Saturation ‘Sticky’ Status bit(1)
1 = Accumulator A is saturated or has been saturated at some time
0 = Accumulator A is not saturated
SB: Accumulator B Saturation ‘Sticky’ Status bit(1)
1 = Accumulator B is saturated or has been saturated at some time
0 = Accumulator B is not saturated
bit 11
bit 10
OAB: OA || OB Combined Accumulator Overflow Status bit
1 = Accumulators A or B have overflowed
0 = Neither Accumulators A or B have overflowed
SAB: SA || SB Combined Accumulator (Sticky) Status bit(4)
1 = Accumulators A or B are saturated or have been saturated at some time in the past
0 = Neither Accumulator A or B are saturated
bit 9
DA: DO Loop Active bit
1 = DO loop in progress
0 = DO loop not in progress
bit 8
DC: MCU ALU Half Carry/Borrow bit
1 = A carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized data)
of the result occurred
0 = No carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized
data) of the result occurred
Note 1: This bit can be read or cleared (not set).
2: The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority
Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when
IPL<3> = 1.
3: The IPL<2:0> Status bits are read only when NSTDIS = 1 (INTCON1<15>).
4: This bit can be read or cleared (not set). Clearing this bit clears SA and SB.
DS70292D-page 28
Preliminary
2009 Microchip Technology Inc.

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